This application is based upon and claims priority of Japanese Patent Application No. 2001-377623, filed on Dec. 11, 2001, the contents being incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, and, in particular, the present invention is best suited when applied to a semiconductor device provided with a gate electrode including silicide.
2. Description of the Related Art
In a system LSI of late years, in order to lower the resistance of wiring connecting between polysilicon gate electrode and element, a laminated structure of polysilicon and silicide is adopted, and a dual structure in which a gate of NMOS transistor is an N-type and a gate of PMOS transistor is a P-type is adopted.
FIGS. 13A, 13B, and 13C, and FIGS. 14A, and 14B are diagrammatic sectional views showing a manufacturing method of a conventional CMOS transistor adopting the above-described dual gate structure in the order of its processes.
As shown in FIG. 13A, after forming a field oxide film 72 and gate oxide films 73a and 73b on a silicon substrate 71, a non-doped polysilicon film is laminated. Then, a resist mask 75 is formed in a region to form a gate and the non-doped polysilicon film is patterned using the resist mask 75 as a mask to form a polysilicon film 74 for forming the gate.
Then, as shown in FIG. 13B, the resist mask 75 is removed, a resist mask 76 is newly formed on the polysilicon film 74 which is positioned in a PMOS forming region, and ion implantation with an arsenic ion (As+) is performed using the resist mask 76 as a mask.
Then, as shown in FIG. 13C, after forming an insulation film to cover the polysilicon film 74 into which the arsenic ion (As+) is injected, anisotropy etching is performed to form side wall spacers 77a and 77b on the side walls of the gate electrode. Then, the surface of polysilicon film 74 in the PMOS forming region is covered with a resist mask 78, and an arsenic ion (As+) is injected into an NMOS side to form source and drain regions in high concentration in the NMOS forming region.
Then, as shown in FIG. 14A, the surface of polysilicon film 74 in the NMOS forming region is covered with a resist mask 79, and a boron ion (B+) is injected into the PMOS side to form source and drain regions in high concentration in the PMOS forming region.
Then, as shown in FIG. 14B, a silicon substrate 71 is heated to activate the impurity injected with the ions. Then, silicide 80 is formed in the gate electrode, and source and drain regions using a high melting point metal.
The resist masks 76 to 79 which are used for formation of a CMOS transistor as described above are generally made of a polymer compound.
However, when ion implantation is performed with a resist mask formed with the polymer compound as a mask, carbide which composes the resist masks 76 to 79 is driven into the surface of the polysilicon film 74 positioned in the edge portion of the resist mask.
Thus-driven carbide can not be removed by resist ashing and washing. Therefore, as shown in FIG. 14B, silicide is considered not to be formed in the regions 81a and 81b where the carbide remains, due to the inhibition of silicide formation, which is disadvantageous in that a semiconductor device can not perform a predetermined operation.
Accordingly it is conceivable to perform ion implantation after the silicon oxide film is laminated on the polysilicon film formed on the semiconductor substrate, and then the silicon oxide film is removed to form silicide, as described in Japanese Patent Laid-opened Official Gazette 2000-138293.
However, there are following disadvantages in the technology described in Japanese Patent Laid-opened Official Gazette 2000-138293.
First, a process to grow the silicon oxide film is required, which results in increase in the manufacturing cost.
Second, since ion implantation is performed through the silicon oxide film, it needs to increase ion implantation energy. Accordingly, diffusion layers of source and drain are formed deep inside the semiconductor substrate, which makes it difficult to realize formation of the transistor in fine size.
In view of the above disadvantages, an object of the present invention is to provide a semiconductor device and a manufacturing method thereof which make it possible to perform a normal operation with low resistant wiring while forming silicide on polysilicon, and to realize reduction of cost and formation of the semiconductor device in a fine size.
The present invention is provided with the following embodiments to solve the above disadvantages.
In a first embodiment of the present invention, a semiconductor device comprises a semiconductor film formed above a semiconductor substrate and a silicide film formed on the above-described semiconductor film, wherein at least one out of the same conductive semiconductor films formed above the semiconductor substrate is connected including two or more differences in concentration along the surface of the semiconductor substrate.
More concretely, it is characterized in that a region where the silicide film is not formed is on a region having the above-described difference in concentration.
With such a formation, the region where the silicide film is not formed and the junction of different conductive-type semiconductor films are not overlapped.
In the first embodiment, the above-described semiconductor film comprises a first conductive-type semiconductor film having two or more differences in concentration and a second conductive-type semiconductor film different from the first conductive-type, wherein a region of low concentration on the first conductive-type semiconductor film is connected to the second conductive-type semiconductor film. Then, it is preferable because the region where the silicide film is not formed does not overlap with the junction of different conductive-type semiconductor films when forming a first conductive-type transistor.
Furthermore, in the first embodiment, the above-described semiconductor film specifically comprises the first conductive-type semiconductor film having two or more differences in concentration, the second conductive-type semiconductor film different from the first conductive-type, and a non-doped semiconductor film in which an impurity is not doped, wherein the non-doped semiconductor film is connectedly sandwiched between the region of low concentration in the first conductive-type semiconductor film and the second conductive-type semiconductor film along the surface of the semiconductor substrate. Then, it is more preferable because the impurity of the first conductive-type and the impurity of the second conductive-type can be injected in any concentration.
Still further, in the first embodiment, the above-described semiconductor film concretely comprises the first conductive-type semiconductor film having two or more differences in concentration, and the second conductive-type semiconductor film having two or more differences in concentration and different from the first conductive-type, wherein a region of low concentration in the first conductive-type semiconductor film is connected with a region of low concentration in the second conductive-type semiconductor film. Then, it is preferable because the silicide film non-forming region does not overlap with the junction of different conductive-type semiconductor films when forming a second conductive-type transistor.
Yet further, in the first embodiment, there exists an impurity in high concentration of the semiconductor film, which is heavier in mass than the impurity existing in the region of low concentration in the semiconductor film.
Furthermore, in the first embodiment, a semiconductor device comprises an insulation film formed on the surface of the semiconductor substrate and diffusion layers formed in the semiconductor substrate in a manner to sandwich a lower region of the same conductive-type semiconductor film so as to form a transistor in which the semiconductor film serves as a gate, the insulation film serves as a gate insulation film, and the diffusion layers serve as a source and a drain.
Still further, in the first embodiment, the semiconductor film is, for instance, a polysilicon film.
In a second embodiment of the present invention, a manufacturing method of a semiconductor device comprises: a first step of forming a semiconductor film above a semiconductor substrate; a second step of forming a first mask layer covering a partial region of the semiconductor film; a third step of forming a first conductive-type semiconductor film in said semiconductor film by injecting a first impurity in a first conductive-type into the semiconductor film using said first mask layer as a mask; a fourth step of removing the first mask layer; a fifth step of forming a second mask layer covering a partial region of the first conductive-type semiconductor film and a semiconductor film different from the first conductive-type semiconductor film to include the boundary region between the first conductive-type semiconductor film and a semiconductor film different from the first conductive semiconductor film; a sixth step of forming the first conductive-type semiconductor film of high concentration and the first conductive-type semiconductor film of low concentration by injecting the second impurity of the same conductive type as said first conductive type, composing of a heavier element in mass than said first impurity into said semiconductor film, using said second mask layer as a mask; a seventh step of removing the second mask layer; and an eighth step of forming silicide on the semiconductor film, so that the silicide non-forming region does not overlap with the junction of semiconductor films having different conductive-types.
In a third embodiment of the present invention, in manufacturing a semiconductor device by forming a silicide film on a gate semiconductor film after forming the gate semiconductor film in which two different conductive-type semiconductor films are in junction with each other above a semiconductor substrate, the manufacturing method of the semiconductor device comprises: a first step of forming a region of low concentration in the same conductive-type semiconductor film by injecting an impurity ion of a light element in at least one semiconductor film of the same conductive type out of the gate semiconductor films; a second step of forming a region of high concentration in the same conductive-type semiconductor film by injecting an impurity ion of a heavy element heavier in mass than the light element into a lower concentration region side with respect to the junction between the two different conductive-type semiconductor films out of the same conductive-type semiconductor films; and a third step of forming a silicide film on the junction between the two different conductive-type semiconductor films, so that the silicide film non-forming region does not overlap with the junction between the two different conductive-type semiconductor films.